Implementing High-Speed DDR3/DDR4 Interfaces

Designing high-speed memory interfaces is a critical aspect of SoC design as it impacts the overall system performance. NovTech training on DDR3/DDR4 memory interfaces covers software and board design factors that need to be taken into account. The training topics include:

• DDR3/DDR4 structure and commands
• Throughput calculations
• Software optimization for achieving the best throughput
• Designing DDR3/DDR4 interfaces for NXP i.MX, Layerscape and Intel Cyclone V SoCs
• Programming configuration, drive strength and timing
• PCB layout and considerations for minimizing noise and timing skews

Customer Feedback

“Yossi was great and very knowledgeable. I think the seminar would be perfect for anyone developing with the i.MX6 SoC. And with his plans to expand it to a several day event, it could evolve into a 'must attend' workshop to those companies either planning to use or currently using the i.MX6 device.”